Next, I will cover connecting a GPS module to a NTP server over USB. This is part of a series on the ch32v307 dev board Previous project I previously setup PPS over USB using a USB Full-Speed (12Mbit) stm32f103 device. One of the limitations of that device is USB Full-Speed
Next step on getting an NTP server running on the ch32v307 dev board is verifying the local clock. This is part of a series on the ch32v307 dev board There's two local clocks to consider: the PTP hardware timestamp clock, and the PPS input capture clock. I'll focus just on
The CH32V307 microcontroller caught my interest because it has both IEEE 1588 timer hardware and the capability to connect via gigabit ethernet. If I ported my NTP server software to it, this would lower the round trip latency (excluding processing time) by around 10x. It's a RISC-V based microcontroller, running
Stratum 2+ NTP servers have multiple potential sources of error, let's experiment with lowering them.
The motivation for this project is NTP servers in datacenters - it can be expensive to get a GPS antenna on top of other people's buildings with a wire running down into your rack. The question is, how do you maximize the accuracy of a stratum 2 NTP server? The
History I'm bringing my RTC Hats [https://blog.dan.drown.org/tag/stratum2/] back online (source code [https://github.com/ddrown/stm32-input-capture-f031] and hardware design [https://github.com/ddrown/stm32-input-capture-f031/tree/master/hardware] is on github). I originally designed it for frequency synchronization without phase alignment [https://blog.dan.drown.
Now that I got the results I wanted from my embedded NTP client [https://blog.dan.drown.org/embedded-ntp-client-ntp-interleaved-mode-part-5/], I wanted to convert it to an NTP server. I also wanted it to support interleaved NTP [https://tools.ietf.org/html/draft-ietf-ntp-interleaved-modes-03] mode, so it could have hardware timestamps for
I'll test what happens when I plug my embedded NTP client directly into my NTP servers, bypassing the Ethernet switch. This ends my long running embedded NTP client series. The systems involved Embedded NTP client (Archmax): Part 4 [https://blog.dan.drown.org/embedded-ntp-client-ntp-interleaved-mode-part-4/], Part 3 [https://blog.dan.drown.
Part 3 [https://blog.dan.drown.org/embedded-ntp-client-ntp-interleaved-mode-part-3/] ended with an unexplained 3us offset, this post will reduce that. Verifying PTP clock sync I wanted to measure the NTP client's PTP clock sync externally. The PTP peripheral has the option to output a PPS that I can compare to the
Previous posts: part 1 [https://blog.dan.drown.org/stm32mp1-ntp-server/], part 2 [https://blog.dan.drown.org/stm32mp1-ntp-server-part-2/], NTP client [https://blog.dan.drown.org/embedded-ntp-client-ntp-interleaved-mode-part-3/] The NTP client confirmed that there was a 943ns difference between my two NTP servers. Now, to investigate where it is coming from. Changes